2 aal1 ces transmitter overview, 1 data path, Figure 31-1. aal1 transmit cell format – Freescale Semiconductor MPC8260 User Manual

Page 1019: Figure 31-2. aal1 sdt cells type, 2 signaling path, Aal1 ces transmitter overview -3, Data path -3, Signaling path -3, Aal1 transmit cell format -3, Aal1 sdt cells type -3

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ATM AAL1 Circuit Emulation Service

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

Freescale Semiconductor

31-3

31.2

AAL1 CES Transmitter Overview

The PowerQUICC II supports both structured and unstructured AAL1 cell formats. For unstructured
format, the transmitter reads 47 bytes from the external buffer and inserts them into the AAL1 user data
field. For structured format, the transmitter reads 46 or 47 bytes from the external buffer and inserts them
into the AAL1 user data field.

31.2.1

Data Path

The AAL1 PDU header, which consists of the sequence number (SN) and the sequence number protection
(SNP) (CRC-3 and parity bit), is generated and inserted into the AAL1 Tx cell, as shown in

Figure 31-1

.

Figure 31-1. AAL1 Transmit Cell Format

When the transmitter operates in structured data transfer (SDT) mode, two types of AAL1 cells are
defined: P (pointer) format and non-P format. The two formats are shown below.

Figure 31-2. AAL1 SDT Cells Type

The transmitter generates the structured pointer according to the I.363.1 ITU standard and inserts the
pointer exactly once every cycle (eight successive cells). The transmitter will insert the structured pointer,
at the first opportunity, into a cell with an even sequence count (SC). When the end of the structure is not
present in the current cycle, a P-format cell with a dummy pointer (127) is inserted into the last cell (SC=6)
of the cycle.

The PowerQUICC II supports partially filled cells configured on a per-VC basis. In this mode, only the
valid octets are filled with user information; the rest of the cell is filled with padding octets.

The PowerQUICC II supports synchronous residual time stamp (SRTS) generation using an external PLL.
If this mode is enabled, the PowerQUICC II reads the SRTS code from external logic and inserts it into
four outgoing cells. See

Section 30.15, “SRTS Generation and Clock Recovery Using External Logic.

31.2.2

Signaling Path

The PowerQUICC II automatically handles the signaling information as part of the interworking function.
The ATM transmitter packs the signaling information at the end of each superframe during the data
segmentation process. Each VC is associated to one signaling block by an internal routing table; see

SN

SNP

SAR-PDU payload

SAR PDU header

SAR-PDU header

ST pointer

AAL1 user information

P format AAL1 cell

Non-P format AAL1 cell

SAR-PDU header

AAL1 user information

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