Freescale Semiconductor MPC8260 - Manual (Page 1196)

ATM Transmission Convergence Layer
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
34-18 Freescale Semiconductor
Step 6
Program the SI to retrieve the data bits (192 bits) out of the T1 frame (193 bits). The SI frame pattern is
programmed in the SI RAM (Rx or Tx), as shown in Table 18.
Step 7
The last step in this example is to initialize the serial interface registers and enable TDM—in this case
TDMa on SI1 as shown in Table 19.
Table 34-11. Programming the SI RAM (Rx or Tx) for a T1 Application
Init Values Description
SI_RAM[00]=0x0000 1 bit is ignored.
SI_RAM[02]=0x015E Route 8 bytes to FCC2.
SI_RAM[04]=0x015E Route 8 bytes to FCC2.
SI_RAM[06]=0x015F Route 8 bytes to FCC2 and go back to the first entry in table.
Table 34-12. Programming SI Registers to Enable TDM
Init Values Description
SI1AMR = 0x0040 Common Receive and Transmit Pins for TDMa
SI1GMR = 01 Enable TDMa