Step 1, Step 2, Step 3 – Freescale Semiconductor MPC8260 User Manual

Page 1195: Table 34-8. enable fcc2, Step 4, Step 5, Table 34-10. programming the tc layer block, Step 1 -17, Step 2 -17, Step 3 -17

Advertising
background image

ATM Transmission Convergence Layer

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

Freescale Semiconductor

34-17

6. Program the Serial Interface (SI)

7. Enable TDM

Step 1

To setup and initialize FCC2, program the FPSMR and GFMR as shown in Table 14. This is for working
with one TC block operating in a single PHY environment. The transmitter and receiver should not be
enabled at this time. In this example, FCC2 does not discard idle cells.

Step 2

Because the FCC2 UTOPIA bus is connected internally to the TC UTOPIA bus, program the parallel ports
and BRGs for the active TDM(s).

Step 3

To enable receiving and transmitting, FCC2 should be programmed as shown in Table 15.

Step 4

To define the connection of FCC2, the CPM MUX should be programmed as shown in Table 16.

Table 34-9. Programming the CPM MUX for a TI Application

Step 5

The TCx layer block should be configured using the TCMODEx and CDSMR1 registers as shown in
Table 17. Note that the TC layer must be enabled after both FCC2 and CPM MUX have been programmed.

Table 34-7. Programming GFMR and FPSMR to Setup the FCC2

Init Values

Description

FPSMR2 = 0x0080_0000

UTOPIA Rx and Tx in Master Mode, Idle cells are not discarded

GFMR2 = 0x0000_000A

ATM Protocol Mode, Receiver and Transmitter are disabled

Table 34-8. Enable FCC2

Init Values

Description

GFMR2 = 0x0000_003A

Enable Rx and Tx

Init Values

Description

CMXFCR = 0x0080_0000

FCC2 is connected to the TC Layer

CMXUAR = 0x0000

FCC2 as UTOPIA master

Table 34-10. Programming the TC Layer Block

Init Values

Description

TCMODE1 = 0xC202

Enable TC Layer Rx and Tx, no error correction on header, the TC is the only PHY on
UTOPIA

CDSMR1 = 0x3980

ALPHA = 7, DELTA = 6 (default values)

Advertising