3 connecting the powerquicc ii to ethernet, Connecting the powerquicc ii to ethernet -4 – Freescale Semiconductor MPC8260 User Manual

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SCC Ethernet Mode

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

25-4

Freescale Semiconductor

25.3

Connecting the PowerQUICC II to Ethernet

The basic interface to the external SIA chip consists of the following Ethernet signals:

Receive clock (RCLK)—a CLKx signal routed through the bank of clocks on the PowerQUICC II.

Transmit clock (TCLK)—a CLKx signal routed through the bank of clocks on the PowerQUICC II.
Note that RCLK and TCLK should not be connected to the same CLKx since the SIA provides
separate transmit and receive clock signals.

Transmit data (TXD)—the PowerQUICC II TXD signal.

Receive data (RXD)—the PowerQUICC II RXD signal.

The following signals take on different functionality when the SCC is in Ethernet mode:

Transmit enable (TENA)—RTS becomes TENA. The polarity of TENA is active high, whereas the
polarity of RTS is active low.

Receive enable (RENA)—CD becomes RENA.

Collision (CLSN)—CTS becomes CLSN. The carrier sense signal is referenced in Ethernet
descriptions because it indicates when the LAN is in use. Carrier sense is defined as the logical OR
of RENA and CLSN.

Figure 25-3. shows the basic components and signals required to make an Ethernet connection between
the PowerQUICC II and EEST.

Figure 25-3. Connecting the PowerQUICC II to Ethernet

The EEST has similar names for its connection to the above seven PowerQUICC II signals. The EEST also
provides a loopback input so the PowerQUICC II can perform external loopback testing, which can be
controlled by any available PowerQUICC II parallel I/O signal. The passive components needed to

PowerQUICC II

EEST

MC68160

TXD

TENA (RTS)

TCLK (CLK

x

)

RXD

RENA (CD)

RCLK (CLK

x

)

CLSN (CTS)

Parallel I/O

Tx
TENA
TCLK
Rx
RENA
RCLK
CLSN

Loop

Passive

Passive

Twisted

Pair

AUI

Preamble

Start Frame

Data

Delimiter

Destination

Address

Type/

Length

Source

Address

Frame Check

Sequence

7 Bytes

1 Byte

6 Bytes

6 Bytes

2 Bytes

46–1500 Bytes

4 Bytes

Stored in Receive Buffer

RJ-45

D-15

Stored in Transmit Buffer

SCC

NOTE: Short Tx frames are padded automatically by the PowerQUICC II.

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