Freescale Semiconductor MPC8260 - Manual (Page 235)

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MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 5-13
shows, this complex configuration is done without additional glue logic. The configuration master controls
the whole process by asserting the EPROM control signals and the system’s address signals as needed.
5.4.2.4 Multiple PowerQUICC IIs in a System with No EPROM
In some cases, the configuration master capabilities of the PowerQUICC II cannot be used. This can
happen for example if there is no boot EPROM in the system or the boot EPROM is not controlled by an
PowerQUICC II.
If this occurs, the user must do one of the following:
• Accept the default configuration,
• Emulate the configuration master actions in external logic (where the PowerQUICC II is a
configuration slave).
• The external hardware should be connected to all RSTCONF pins of the different devices and to
the upper 32 bits of the data bus. During PORESET, the rising edge the external hardware should
negate all RSTCONF inputs to put all of the devices in their configuration slave mode. For 1,024
clocks after PORESET negation, the external hardware can configure the different devices by
driving appropriate configuration words on the data bus and asserting RSTCONF for each device
to strobe the data being received.