Freescale Semiconductor MPC8260 - Manual (Page 1063)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 32-1
Chapter 32
ATM AAL2
NOTE
The functionality described in this chapter is not available on the MPC8250
nor on rev A.1 .29
µm (HiP3) silicon.
Refer to www.freescale.com for the latest RAM microcode packages that
support enhancements.
The microcode implementation of the ATM adaptation layer type 2 (AAL2) on the PowerQUICC II is
compliant with the ITU-T recommendations I.363.2 and I.366.1. This chapter describes the functionality
and data structures of AAL2 CPS, CPS switching, and SSSAR and should be used as a supplement to
Chapter 30, “ATM Controller and AAL0, AAL1, and AAL5.”
32.1 Introduction
AAL2 enables the multiplexing of voice and data channels over a single ATM VC. The channels consist
of packets transported within individual ATM cells (see
Figure 32-1 ). Packet lengths are allowed to vary
in order to accommodate bandwidth fluctuations of the individual channels. Each packet has a channel
identifier (CID) so that each AAL2 user (channel) is uniquely identified by the triplet VP | VC | CID.
Figure 32-1. AAL2 Data Units
ATM header STF
ATM cell
PH PP PH PP Padding
STF
CPS PDU
PH PP PH PP Padding
PH PP PH PP
SSSAR SDU
SSSAR
CPS
ATM
SSSAR PDU