3 idcr_init command, 4 idcr root parameters, Table 33-25. idcr ima root parameters – Freescale Semiconductor MPC8260 User Manual

Page 1156: 5 idcr table entry, Table 33-26. idcr table entry, Idcr_init command -54, Idcr root parameters -54, Idcr table entry -54, Idcr ima root parameters -54

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Inverse Multiplexing for ATM (IMA)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

33-54

Freescale Semiconductor

33.4.8.3

IDCR_Init Command

The IDCR_Init command is a host command issued to the CPCR (refer to

Section 14.4.1, “CP Command

Register (CPCR)

). This command selects and configures the IDMA request which will be used for the

IDMA master clock. Any of the IDMA channels may be selected for this function.

The format of the command is as follows:

SBC = [per the selected IDMA channel]

OPCODE = 0x00

PAGE = [per the selected IDMA channel]

33.4.8.4

IDCR Root Parameters

The following IDCR parameters are added to the IMA root table only when IDCR is used.

33.4.8.5

IDCR Table Entry

A table entry of the format provided below must be provided for any IMA group for which IDCR recovery
is performed. Table entries in the IDCR table are indexed by the group number of the associated group.
The table entry must be initialized before the associated bit is set in IDCREN.

Table 33-25. IDCR IMA Root Parameters

1

1

Boldfaced entries indicate parameters that must be initialized by the user. All other parameters are
managed by the microcode and should be initialized to zero unless otherwise stated.

Offset Name

Width

Description

0x60

IDCR_BASE

Hword

IDCR table base. Offset of the IDCR table in DPRAM. Must be 8-byte
aligned.

0x62

IDCRTICK

Hword

IDCR global tick counter. Initialize to zero.

0x64

IDCREN

Byte

IDCR enable array. Each bit (0-7) enables/disables the IDCR timer for
the associated IMA group. Initialize to zero at FCC initialization.
0 The IDCR for the associated group is disabled.
1 The IDCR for the associated group is enabled.

0x65

IDCR_LAST

Byte

Group number of last enabled IDCR timer.

0x66

IDCR_SVC

Byte

IDCR timer currently being serviced. Microcode-managed parameter.
Initialize to zero.

Table 33-26. IDCR Table Entry

Offset Name

Width

Description

0x00

IDCRCNT

Hword

IDCR count. Holds the count of the IDCR timer for this IMA group.
Decremented once for each IDCR master clock tick.
Initialize to IDCRREQ.

0x02

IDCRCNTF

Hword

IDCR count fraction. Holds the fractional portion of the count of the
IDCR timer for this IMA group.
Initialize to IDCRREQF.

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