Freescale Semiconductor MPC8260 - Manual (Page 1251)

Serial Peripheral Interface (SPI)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 38-5
Figure 38-3. Multimaster Configuration
The maximum sustained data rate that the SPI supports is SYSTEMCLK/50. However, the SPI can transfer
a single character at much higher rates—SYSTEMCLK/4 in master mode and SYSTEMCLK/2 in slave
SPIMISO
SPIMOSI
SELOUT0
SPISEL
SPICLK
SELOUT3
SELOUT1
SPI #2
SPIMISO
SPIMOSI
PowerQUICC II
SELOUT1
SPISEL
SPICLK
SELOUT3
SELOUT2
SPIMISO
SPIMOSI
SPI #1
SELOUT0
SPISEL
SPICLK
SELOUT3
SELOUT2
SPI #0
Notes:
• All signals are open-drain
• For a system with more than two masters, SPISEL and SPIE[MME] do not detect all possible conflicts
• It is the responsibility of software to arbitrate for the SPI bus (with token passing, for example)
• SELOUT
x signals are implemented in software with general-purpose I/O signals
SP
IS
EL
1
SP
IS
EL
0
SP
IS
EL
3
SP
IS
EL
2
SPIMISO
SPIMOSI
SELOUT0
SPISEL
SPICLK
SELOUT2
SELOUT1
SPI #3
PowerQUICC II
PowerQUICC II
PowerQUICC II