Figure 20-7. scc bd and buffer memory structure, Scc bd and buffer memory structure -12, Figure 20-7 – Freescale Semiconductor MPC8260 User Manual

Page 690

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Serial Communications Controllers (SCCs)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

20-12

Freescale Semiconductor

Figure 20-7. SCC BD and Buffer Memory Structure

In all protocols, BDs can point to buffers in the internal dual-port RAM. However, because dual-port RAM
is used for descriptors, buffers are usually put in external RAM, especially if they are large.

The CPM processes TxBDs straightforwardly; when the transmit side of an SCC is enabled, the CPM
starts with the first BD in that SCC TxBD table. Once the CPM detects that the R bit is set in the TxBD,
it starts processing the buffer. The CPM detects that the BD is ready when it polls the R bit or when the
user writes to the TODR. After data from the BD is put in the Tx FIFO, if necessary the CPM waits for the
next descriptor’s R bit to be set before proceeding. Thus, the CPM does no look-ahead descriptor
processing and does not skip BDs that are not ready. When the CPM sees a BD’s W bit (wrap) set, it returns
to the start of the BD table after this last BD of the table is processed. The CPM clears R (not ready) after
using a TxBD, which keeps it from being retransmitted before it is confirmed by the core. However, some
protocols support a continuous mode (CM), for which R is not cleared (always ready).

The CPM uses RxBDs similarly. When data arrives, the CPM performs required processing on the data
and moves resultant data to the buffer pointed to by the first BD; it continues until the buffer is full or an
event, such as an error or end-of-frame detection, occurs. The buffer is then closed; subsequent data uses
the next BD. If E = 0, the current buffer is not empty and it reports a busy error. The CPM does not move
from the current BD until E is set by the core (the buffer is empty). After using a descriptor, the CPM clears
E (not empty) and does not reuse a BD until it has been processed by the core. However, in continuous
mode (CM), E remains set. When the CPM discovers a descriptor’s W bit set (indicating it is the last BD
in the circular BD table), it returns to the beginning of the table when it is time to move to the next buffer.

Status and Control

Buffer Length

Buffer Pointer

SCC

x

TxBD

Table Pointer

SCC

x

RxBD

Table Pointer

SCC

x

RxBD

Table

SCC

x

TxBD

Table

Dual-Port RAM

Status and Control

Buffer Length

Buffer Pointer

Tx Buffer

External Memory

Rx Buffer Descriptors

Tx Buffer Descriptors

Rx Buffer

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