Freescale Semiconductor MPC8260 User Manual

Page 866

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Multi-Channel Controllers (MCCs)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

28-18

Freescale Semiconductor

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Flow control

SS7 features are as follows:

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Up to 128 independent communication channels (64 channels per MCC)

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Independent mapping for receive and transmit

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Standard HDLC features

— Flag/Abort/Idle generation/detection

— Zero insertion/deletion

— 16-bit CRC-CCITT generation/checking

— Detection of non-octet aligned signal units

— Programmable number of flags between signal units

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Maintenance of signal unit error monitor (SUERM)

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Maintenance of alignment error rate monitor (AERM)

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Maintenance of separate counters for error-free and bad frames

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Detection and stripping of long signal units

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Discard of short signal units (less than 5 octets)

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Transmission of signal units with a programmable delay (applies to JT-Q.703 standard)

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Automatic transmission of fill-in signal units (FISU)

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Automatic retransmission of signal units (for link-status signal unit (LSSU) retransmission)

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Automatic discard of identical FISUs and LSSUs using a user-defined mask

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Octet counting mode in case of long signal units and receiver overrun

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Five circular interrupt tables with programmable size and overflow identification—one for
transmit and four for receive.

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Global or individual channel loop modes

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Efficient bus usage (no bus usage for inactive channels or for active channels with nothing to send)

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Efficient control of interrupts to the CPU

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Supports external BD tables

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Uses on-chip dual-port RAM for parameter storage

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Uses 64-bit data transactions for reading and writing data in BDs

Table 28-10

describes channel-specific parameters for SS7. Note that a given parameter location may have

a different definition depending on the standard used (ITU-T/ANSI or Japanese standard).

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