Table 9-57. optpr field descriptions, 4 i2o registers, 1 inbound fifo queue port register (ifqpr) – Freescale Semiconductor MPC8260 User Manual

Page 383: I2o registers -77, Inbound fifo queue port register (ifqpr) -77, Optpr field descriptions -77, Figure 9-72, Table 9-57, O registers

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PCI Bridge

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

Freescale Semiconductor

9-77

Figure 9-72. Outbound Post_FIFO Tail Pointer Register (OPTPR)

9.12.3.4

I

2

O Registers

9.12.3.4.1

Inbound FIFO Queue Port Register (IFQPR)

IFQPR is used by PCI masters to access inbound messages in local memory. Local processor does not have
access to this port. IFQPR should be accessed only from the PCI bus. IFQPR is described in

Figure 9-73

and

Table 9-58

.

Figure 9-73. Inbound FIFO Queue Port Register (IFQPR)

31

20

19

16

Field

QBA

OPTP

Reset

0000_0000_0000_0000

R/W

R

R/W

Addr

0x104DA

15

2

1

0

Field

OPTP

Reset

0000_0000_0000_0000

R/W

R/W

R

Addr

0x104D8

Table 9-57. OPTPR Field Descriptions

Bits

Name

Description

31–20

QBA

Queue base address. When read returns the contents of QBAR bits 31-20.

19–2

OPTP

Outbound post_FIFO tail pointer. Local memory offset of the tail pointer of the outbound post
list FIFO.

1–0

Reserved, should be cleared.

31

16

Field

IFQP

Reset

0000_0000_0000_0000

R/W

R/W

Addr

0x10442

15

0

Field

IFQP

Reset

0000_0000_0000_0000

R/W

R/W

Addr

0x10440

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