Freescale Semiconductor MPC8260 - Manual (Page 1315)

Reference Manual (Rev 1) Errata
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor B-13
33.4.7.1, 33- 47 Add DSL to Offset + 0 in Figure 33-29 and Table 33-23, as shown in the
following:
33.4.10, 33-54 Add the following new section:
33.4.10 Changing IMA Version
A new CPCR command has been added to the IMA microcode to change the IMA version
on-the-fly without software intervention. Use the following procedure:
1. Before issuing the command, the user should initialize the COMM_INFO fields in the
parameter RAM as described in Figure Table 33-13. .
2. To issue this FCC command, refer to Section 20.4, “Command Set.” Use opcode 1101 (0xD).
m
3. Wait for the CPCR[FLG] to be cleared by the CPM before issuing a new CP command. Refer
to Section 20.4, “Command Set.”
0 1 2 3 5 6 7 8 9 10 11 12 13 14 15
OFFSET + 0 V — W — TQU TQO — DSL LS DCBO LDS GDS IFSD IFSW
OFFSET + 2 L/G NUM
9 DSL DCB synchronization lost. This interrupt is issued when a link in a group with IGRSTATE[GDSS] = 11
loses synchronization, and the link enters HUNT state at the IFSM.
0 8 9 11 12 15
0x86 — ITG —
0x88 Filler CRC
0x8A — IV
Table 33-13. COMM_INFO Field
Offset Bits Name Description
0x86 0–8 — Reserved, should be cleared.
9–11 ITG IMA transmit group. Program to the IMA group number [0–7] multiplied by 16 bytes.
For example, if the IMA group number = 3, program ITG to 0x30.
12–15 — Reserved, should be cleared.
0x88 0–15 Filler CRC Filler cell CRC. Set to 0xC602 (for IMA version 1.0) or 0xD902 (for IMA version 1.1)
0x8A 0–13 — Reserved, should be cleared.
14–15 IV IMA version
00 Reserved
01 IMA version 1.0
10 Reserved
11 IMA version 1.1