Freescale Semiconductor MPC8260 - Manual (Page 311)

PCI Bridge
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 9-5
9.8 CompactPCI Hot Swap Specification Support
CompactPCI is an open specification supported by the PCI Industrial Computer Manufacturers Group
(PICMG) and is intended for embedded applications using PCI. CompactPCI Hot Swap is an extension of
the CompactPCI specification and allows the insertion and extraction (or “hot swapping”) of boards
without adversely affecting system operation.
The Hot Swap specification defines three levels of support:
• Hot Swap capable
• Hot Swap friendly
• Hot Swap ready
The PowerQUICC II is a Hot Swap friendly device, meaning that it supports the hardware and software
connection processes as defined in the Hot Swap specification. This level of support allows the board and
system designers to build full Hot Swap and high availability systems based on the PowerQUICC II device
as a PCI target device. The only compliance exception is that the device pins are not 5-volt tolerant.
Application boards should be used in 3.3V signaling back planes, or add 5-to-3.3 volt signaling voltage
converters, if needed, to be used in 5V back planes.
For more information regarding the Hot Swap process, refer to the Hot Swap Specification PICMG 2.1,
R1.0, August 3, 1998.
9.9 PCI Interface
The PCI bridge connects the processor and memory system to the I/O components via the PCI system bus.
This interface acts as both initiator (master) and target (slave) device. The PCI bridge uses a 32-bit
multiplexed, address/data bus that can run at frequencies up to 66 MHz. The interface provides address
and data parity with error checking and reporting. The interface provides for three physical address
spaces—32-bit address memory, 32-bit address I/O, and PCI configuration space.
The PCI bridge can function as either a host bridge or an agent device. Note that the PCI bridge can be
configured from the PCI bus while in agent mode. An address translation mechanism is provided to map
PCI memory windows between the host and agent.
The following are the major features supported by the PCI interface:
• PCI Specification Revision 2.2 compliant
• On-chip arbitration supports 3 external PCI bus masters (in addition to the PCI bridge itself)
• Arbiter supports high-priority request and grant signal pairs
• Supports accesses to all PCI address spaces
• Supports PCI-to-60x-memory and 60x-memory-to-PCI streaming
• Memory prefetching of PCI read accesses and support for delayed read transactions
• Supports posting of processor to PCI and PCI to memory writes
• Supports selectable snoop
• PCI host bridge capabilities
• PCI agent mode capabilities which include the ability to configure from a remote host