Freescale Semiconductor MPC8260 - Manual (Page 1357)

Part I—Overview I
Overview 1
G2 Core 2
Memory Map 3
Part II—Configuration and Reset II
System Interface Unit (SIU) 4
Reset 5
Part III—The Hardware Interface III
External Signals 6
60x Signals 7
The 60x Bus 8
PCI Bridge 9
Clocks and Power Control 10
Memory Controller 11
Secondary (L2) Cache Support 12
IEEE 1149.1 Test Access Port 13
Part IV—Communications Processor Module IV
Communications Processor Module Overview 14
Serial Interface with Time-Slot Assigner 15
CPM Multiplexing 16
Baud-Rate Generators (BRGs) 17
Timers 18
SDMA Channels and IDMA Emulation 19
Serial Communications Controllers (SCCs) 20
SCC UART Mode 21
SCC HDLC Mode 22
SCC BISYNC Mode 23
SCC Transparent Mode 24
SCC Ethernet Mode 25
SCC AppleTalk Mode 26
Serial Management Controllers (SMCs) 27
Multi-Channel Controllers (MCCs) 28
Fast Communications Controllers (FCCs) 29
ATM Controller and AAL0, AAL1, and AAL5 30
ATM AAL1 Circuit Emulation Service 31
ATM AAL2 32
Inverse Multiplexing for ATM (IMA) 33
ATM Transmission Convergence Layer 34