Freescale Semiconductor MPC8260 - Manual (Page 114)

Overview
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
1-20 Freescale Semiconductor
core. The CP can store large data frames in the local memory without interfering with the operation of the
system core. (Refer to note at the beginning of
Section 1.7, “Application Examples.” )
Figure 1-9. Basic System Configuration
1.7.2.2 High-Performance Communication
Figure 1-10 shows a high-performance communication configuration.
Figure 1-10. High-Performance Communication
PowerQUICC II
60x Bus
SDRAM/SRAM/DRAM/Flash
Local Bus
SDRAM/SRAM/DRAM
ATM
Connection Tables
Communication
Channels
UTOPIA
PHY
155 Mbps
PHY ATM
PowerQUICC II A
60x Bus
SDRAM/SRAM/DRAM/Flash
Local Bus
SDRAM/SRAM/DRAM
ATM
Connection Tables
Communication
Channels
UTOPIA
PowerQUICC II B
Local Bus
SDRAM/SRAM/DRAM
ATM
Connection Tables
or
PCI Bus
(master/slave)
PHY
155 Mbps
PHY ATM
Communication
Channels
UTOPIA
PHY
155 Mbps
PHY ATM