Freescale Semiconductor MPC8260 - Manual (Page 109)

Overview
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 1-15
Figure 1-3. Remote Access Server Configuration
In this application, eight TDM ports are connected to external framers. In the PowerQUICC II, each group
of four ports support up to 128 channels. One TDM interface can support 32–128 channels. The
PowerQUICC II receives and transmits data in transparent or HDLC mode, and stores or retrieves the
channelized data from memory. The data can be stored either in memory residing on the 60x bus or in
memory residing on the local bus.
The main trunk can be configured as 155 Mbps full-duplex ATM, using the UTOPIA interface, or as
10/100 BaseT Fast Ethernet with MII interface, or as a high-speed serial channel (up to 45 Mbps). In ATM
mode, there may be a need to store connection tables in external memory on the local bus; for example,
128 active internal connections require 8 Kbytes of dual-port RAM. The need for local bus depends on the
total throughput of the system. The PowerQUICC II supports automatic (without software intervention)
cross connect between ATM and MCC, routing ATM AAL1 frames to MCC slots.
The local bus can be used as an interface to a bank of DSPs that can run code that performs analog modem
signal modulation. Data to and from the DSPs can be transferred through the parallel bus with the internal
virtual IDMA.
The PowerQUICC II memory controller supports many types of memories, including EDO DRAM and
page-mode, pipeline SDRAM for efficient burst transfers.
PowerQUICC II
TDM0
TDM7
Quad
T1
Framer
UTOPIA Multi PHY
60x Bus
SDRAM/DRAM/SRAM
Channelized Data
Local Bus
SDRAM/DRAM/SRAM
ATM
Connection Tables
(up to 256 channels)
SMC/I2C/SPI/SCC
Slow
Comm
PHY
10/100BaseT
E3 clear channel
(takes one TDM)
or
or
Slaves
DSP Bank
on
Local
Bus
(optional)
Framer
MII
Transceiver
155 Mbps
PHY ATM