Freescale Semiconductor MPC8260 - Manual (Page 1017)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 31-1
Chapter 31
ATM AAL1 Circuit Emulation Service
NOTE
The functionality described in this chapter is not available on the MPC8250
nor on .29
µm (HiP3) rev A.1 silicon.
Refer to www.freescale.com for the latest RAM microcode packages that
support enhancements.
This chapter describes implementation of circuit emulation service (CES) using ATM adaptation layer
type 1 (AAL1) on the PowerQUICC II and should be used as a supplement to
Chapter 30, “ATM
Controller and AAL0, AAL1, and AAL5.”
31.1 Features
The AAL1 CES features on the PowerQUICC II are as follows:
• AAL1
— Reassembly
– Reassembles PDU directly to external memory
– Supports partially filled cells (configurable on a per-VC basis)
– Sequence number (SN) protection (CRC-3 and parity) check
– Implements a 3-step SN algorithm
– Detects and handles lost or misinserted cell
– Maintains bit count integrity (dummy cell insertion)
– Dummy cell contents can be programmed by the user (per FCC)
– Pointer verification in structured AAL1 cell format
– Automatic synchronization using the structured pointer during reassembly
– SRTS (synchronous residual time stamp) gathering on every cycle (8 cells) in unstructured
AAL1
– Statistics gathering on a per-VC basis:
– AAL1 valid cell count
– AAL1 lost cell count
– AAL1 misinserted cell count
– AAL1 pointer mismatch/parity error
– AAL1 Rx buffer pre-overflow
— Segmentation