Freescale Semiconductor MPC8260 - Manual (Page 1105)

Inverse Multiplexing for ATM (IMA)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 33-3
— Discards cells with bad HECs (available on .25
µm (HiP4) rev B silicon and forward)
• Delay synchronization--correlating IMA frames among links of a group
• Maximum differential delay supported is user-programmable
• Optionally recovers IMA data clock rate (IDCR)
• Provides interrupts on errors/state changes
• Maintains low-level statistic counters
— Transmit stuff events
— Receive stuff events
— Receive ICP violations
— Receive Out-of-IMA Frame anomalies
33.1.1 References
The features provided by the IMA microcode are driven by The ATM Forum’s IMA specification. The
implementation of the IMA microcode is driven by the features, architecture, and resources available on
the PowerQUICC II. In addition to published PowerQUICC II device errata, users should be familiar with
the following (available at www.atmforum.com):
• The ATM Forum Technical Committee. Inverse Multiplexing for ATM (IMA) Specification
Version 1.1 - AF-PHY-0086.001
• The ATM Forum Technical Committee. Inverse Multiplexing for ATM (IMA) Specification
Version 1.0 - AF-PHY-0086.000
33.1.2 IMA Versions Supported
The IMA microcode supports IMA version 1.0 and version 1.1, with only minor configuration changes.
These include the following:
• Programming the IMA version encoding in the OAM labels of the transmit ICP and Filler cell
templates.
• Programming the validated OAM label field in the IMA group receive parameters.
33.1.3 PowerQUICC II Versions Supported
IMA support in ROM is available on the MPC8264 and the MPC8266. On these derivatives of the
PowerQUICC II family, integrated DS1/E1 transmission convergence (TC) layer hardware facilitates HEC
checking of received cells. (Refer to
Chapter 34, “ATM Transmission Convergence Layer.” ) So in these
PowerQUICC II devices, IMA support is available for either the integrated DS1/E1 TC layer or external
UTOPIA PHY devices connected via UTOPIA Level 2 multi-PHY.
33.1.4 PHY-Layer Devices Supported
The IMA microcode is primarily targeted at ATM’s primary application (i.e. IMA over multiple DS1/E1).
However, the IMA microcode supports any UTOPIA PHY device which (1) has a constant data rate and