Freescale Semiconductor MPC8260 User Manual

Page 840

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Serial Management Controllers (SMCs)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

27-28

Freescale Semiconductor

Data length represents the number of octets the CP should transmit from this buffer. It is never modified
by the CP. The data length can be even or odd, but if the number of bits in the transparent character is
greater than 8, the data length should be even. For example, to transmit three transparent 8-bit characters,
the data length field should be initialized to 3. However, to transmit three transparent 9-bit characters, the
data length field should be initialized to 6 because the three 9-bit characters occupy three half words in
memory.

The data buffer pointer points to the first byte of the buffer. They can be even or odd, unless character
length is greater than 8 bits, in which case the transmit buffer pointer must be even. For instance, the
pointer to 8-bit transparent characters can be even or odd, but the pointer to 9-bit transparent characters
must be even. The buffer can reside in internal or external memory.

27.4.10 SMC Transparent Event Register (SMCE)/Mask Register (SMCM)

The SMC event register (SMCE) generates interrupts and reports events recognized by the SMC channel.
When an event is recognized, the SMC sets the corresponding SMCE bit. Interrupts are masked in the
SMCM, which has the same format as the SMCE. SMCE bits are cleared by writing a 1 (writing 0 has no
effect). Unmasked bits must be cleared before the CP clears the internal interrupt request. The SMCE and
SMCM registers are displayed in

Figure 27-14

.

2

W

Wrap (final BD in table).
0 Not the last BD in the table.
1 Last BD in the table. After this buffer is used, the CP receives incoming data into the first BD that

TBASE points to. The number of TxBDs in this table is programmable and determined by theW
bit and overall space constraints of the dual-port RAM.

3

I

Interrupt.
0 No interrupt is generated after this buffer is serviced.
1 SMCE[TXB] or SMCE[TXE] are set when the buffer is serviced. They can cause interrupts if they

are enabled.

4

L

Last in message.
0 The last byte in the buffer is not the last byte in the transmitted transparent frame. Data from the

next transmit buffer (if ready) is sent immediately after the last byte of this buffer.

1 The last byte in this buffer is the last byte in the transmitted transparent frame. After this buffer is

sent, the transmitter requires synchronization before the next buffer is sent.

5

Reserved, should be cleared.

6

CM

Continuous mode.
0 Normal operation.
1 The CP does not clear R after this BD is closed, allowing the buffer to be automatically resent

when the CP accesses this BD again. However, the R bit is cleared if an error occurs during
transmission, regardless of how CM is set.

7–13

Reserved, should be cleared.

14

UM

Underrun. Set when the SMC encounters a transmitter underrun condition while sending the buffer.

15

Reserved, should be cleared.

Table 27-15. SMC Transparent TxBD Field Descriptions

Bits

Name

Description

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