Table 30-37. aal0 rxbd field descriptions, 7 aal1 ces rxbd, 8 aal2 rxbd – Freescale Semiconductor MPC8260 User Manual

Page 995: Aal1 ces rxbd -75, Aal2 rxbd -75, Aal0 rxbd field descriptions -75

Advertising
background image

ATM Controller and AAL0, AAL1, and AAL5

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

Freescale Semiconductor

30-75

30.10.5.7 AAL1 CES RxBD

Refer to

Section 31.12.1, “AAL1 CES RxBD.”

30.10.5.8 AAL2 RxBD

Refer to

Section 32.4.4.4, “CPS Receive Buffer Descriptor (RxBD).”

Table 30-37. AAL0 RxBD Field Descriptions

Offset

Bits

Name

Description

0x00

0

E

Empty
0 The buffer associated with this RxBD is filled with received data, or data reception was

aborted due to an error. The core can examine or write to any fields of this RxBD. The
CP does not use this BD again while E remains zero.

1 The Rx buffer is empty or reception is in progress. This RxBD and its associated

receive buffer are owned by the CP. Once E is set, the core should not write any fields
of this RxBD.

1

Reserved, should be cleared.

2

W

Wrap (final BD in table)
0 This is not the last BD in the RxBD table of the current channel.
1 This is the last BD in the RxBD table of the current channel. After this buffer has been

used, the CP will receive incoming data into the first BD in the table. The number of
RxBDs in this table is programmable and is determined only by the W bit. The current
table cannot exceed 64 Kbytes.

3

I

Interrupt
0 No interrupt is generated after this buffer has been used.
1 An Rx buffer event is sent to the interrupt queue after the ATM controller uses this

buffer. FCCE[GINT

x

] is set when the INT_CNT reaches the global interrupt threshold.

4–5

Reserved, should be cleared.

6

CM

Continuous mode
0 Normal operation.
1 The CP does not clear the E bit after this BD is closed, allowing the associated buffer

to be overwritten automatically when the CP next accesses this BD.

7–9

Reserved, should be cleared.

10

CRE

Rx CRC error. Indicates a CRC10 error in the current AAL0 buffer. The CRE bit is
considered an error only if the received cell had a CRC10 field in the cell payload.

11

OAM

Operation and maintenance cell. If OAM is set, the current AAL0 buffer contains an OAM
cell. This cell is associated with the channel indicated by the channel code field (CC
field).

12-15

Reserved, should be cleared.

0x02

DL/CC

Data length/channel code. If RxBD[OAM] is set, this field functions as CC; otherwise, it
is DL. Data length is the size in octets of this buffer (MRBLR value). Channel code
specifies the channel code associated with this OAM cell.

0x04

RXDBPTR Rx data buffer pointer. Points to the first location of the associated buffer; may reside in

either internal or external memory. This pointer must be burst-aligned.

Advertising