Freescale Semiconductor MPC8260 - Manual (Page 1023)

ATM AAL1 Circuit Emulation Service
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 31-7
ATM receiver, set RCT[INVE] of the AAL1 CES-specific areas of the receive connection table; see
Section 31.9.1, “Receive Connection Table (RCT).” For the MCC receiver, set CHAMR[EP].
31.4.1.1 ATM-to-TDM
When going from ATM to TDM (depicted in Figure 31-5 ), the ATM receiver reassembles data received
from a particular channel to a specific BD table. The MCC transmitter is programmed to operate on the
same table. When the ATM controller fills a receive buffer, the MCC controller sends it. The controllers
synchronize on the ATM controller’s RxBD[E] and the MCC’s TxBD[R].
A threshold mechanism for the MCC transmitter is used to synchronize the automatic start of the
ATM-to-TDM data forwarding. The transmitter waits until the start threshold is reached (enough cells are
received) before sending the valid data. In effect, the MCC start threshold mechanism implements a jitter
buffer designed to accommodate the CDV of the ATM network.
In a CES application, software should first initialize the MCC transmitter, then initialize the ATM receiver.
This way the MCC transmitter sends idle data (0xFF) until the ATM receiver fills enough buffers to reach
the MCC start threshold. (The receiver is effectively filling a jitter buffer.) When the
CES_Adaptive_Counter (CESAC) reaches the MCC_Start threshold, the MCC super channel polling
CESAC starts sending the received data with the first frame SYNC. (The first octet using the first BD is
sent on the first assigned time slot.)
Section 31.5, “ATM-to-TDM Adaptive Slip Control,” shows the flow
of ATM-to-TDM interworking.
Figure 31-5. ATM-to-TDM Interworking
31.4.1.2 TDM-to-ATM
When going from TDM to ATM (depicted in Figure 31-6 ), the MCC receiver routes data from the TDM
line to a specific BD table. The ATM transmitter is programmed to operate on the same BD table. When
the MCC fills a receive buffer, the ATM controller sends it. The two controllers synchronize on the MCC’s
RxBD[E] and the ATM controller’s TxBD[R].
In a CES application, first initialize the ATM transmitter, then initialize the MCC receiver and set
CHAMR[EP].
BD 1
BD 2
BD 3
BD 4
BD 5
Buffer 1
Buffer 2
Buffer 3
Buffer 4
Buffer 5
MCC
Tx
TDM
interface
MCC
Tx pointer
ATM
Rx pointer
ATM
Rx
UTOPIA
interface
BD table
Note: The ATM Rx should be programmed to operate in
inverted polarity E (Empty) bit.
0
1
1
0
0