Freescale Semiconductor MPC8260 - Manual (Page 994)

ATM Controller and AAL0, AAL1, and AAL5
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
30-74 Freescale Semiconductor
30.10.5.6 AAL0 RxBD
Figure 30-48 shows the AAL0 RxBD.
Table 30-37 describes AAL0 RxBD fields.
Table 30-36. AAL1 RxBD Field Descriptions
Offset Bits Name Description
0x00 0 E Empty
0 The buffer associated with this RxBD is filled with received data or data reception was
aborted due to an error. The core can read or write any fields of this RxBD. The CP
cannot use this BD again while E = 0.
1 The buffer is not full. This RxBD and its associated receive buffer are owned by the
CP. Once E is set, the core should not write any fields of this RxBD.
1 — Reserved, should be cleared.
2 W Wrap (final BD in table)
0 This is not the last BD in the RxBD table of the current channel.
1 This is the last BD in the RxBD table of this current channel. After this buffer is used,
the CP receives incoming data into the first BD in the table. The number of RxBDs in
this table is programmable and is determined only by the W bit. The current table
overall space is constrained to 64 Kbytes.
3 I Interrupt
0 No interrupt is generated after this buffer has been used.
1 An Rx buffer event is sent to the interrupt queue after the ATM controller uses this
buffer. FCCE[GINT x ] is set when the INT_CNT reaches the global interrupt threshold.
4 SNE Sequence number error. SNE is set when a sequence number error is detected in the
current AAL1 CES buffer.
5 — Reserved, should be cleared.
6 CM Continuous mode
0 Normal operation.
1 The empty bit (RxBD[E]) is not cleared by the CP after this BD is closed, allowing the
associated buffer to be overwritten automatically when the CP next accesses this BD.
7–15 — Reserved, should be cleared.
0x02 — DL Data length. The number of octets the CP writes into the buffer once its BD is closed.
0x04 — RXDBPTR Rx data buffer pointer. Points to the first location of the associated buffer; may reside in
either internal or external memory. It is recommended that the pointer be burst-aligned.
0 1 2 3 4 5 6 7 9 10 11 12 15
Offset + 0x00 E — W I — CM — CRE OAM —
Offset + 0x02 Data Length (DL)/Channel Code (CC)
Offset + 0x04 Rx Data Buffer Pointer (RXDBPTR)
Offset + 0x06
Figure 30-48. AAL0 RxBD