Freescale Semiconductor MPC8260 - Manual (Page 987)

ATM Controller and AAL0, AAL1, and AAL5
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 30-67
Figure 30-41. Transmit Buffers and BD Table Example
30.10.5.2 Receive Buffer Operation
For AAL5 channels, the user should choose to operate in static buffer allocation or in global buffer
allocation by writing to RCT[BUFM]. AAL1 CES and AAL0 channels must use static buffer allocation.
30.10.5.2.1 Static Buffer Allocation
The user prepares a table of BDs pointing to the receive buffers. The address of the first BD is put in the
channel’s RCT[RBD_BASE]. When an ATM cell arrives, the CP opens the first BD in the table and starts
filling its associated buffer with received data. When the current buffer is full, the CP increments
RBD_Offset, which is the offset to the current BD from RBD_BASE, and reads the next BD in the table.
If the BD is empty (RxBD[E] = 1), the CP continues receiving. If the BD is not empty, a busy condition
has occurred and a busy interrupt is sent to the event queue.
Figure 30-42 shows the empty bit in the RxBD tables and their associated buffers for two example ATM
channels.
Tx Buffer 1 of Channel 1
Tx Buffer 2 of Channel 1
Tx Buffer 3 of Channel 1
Tx Buffer 4 of Channel 1
Tx Buffer 5 of Channel 1
Ch1 TxBD Table
0 BD 1
1 BD 2
1 BD 3
0 BD 4
0 BD 5
TBD_BASE
TBD_Offset
Note: The shaded buffers are ready to be sent; unshaded buffers are waiting to be prepared.
Ch1 TxBD Table
Pointers in the TCT
Tx Buffer 1 of Channel 4
Tx Buffer 2 of Channel 4
Tx Buffer 3 of Channel 4
Tx Buffer 4 of Channel 4
Tx Buffer 5 of Channel 4
Ch4 TxBD Table
1 BD 1
0 BD 2
0 BD 3
0 BD 4
0 BD 5
TBD_BASE
TBD_Offset
Ch4 TxBD Table
Pointers in the TCT
1 BD 6
BD 7
Tx Buffer 6 of Channel 4
Tx Buffer 7 of Channel 4
1