Freescale Semiconductor MPC8260 - Manual (Page 1126)

Inverse Multiplexing for ATM (IMA)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
33-24 Freescale Semiconductor
available in its delay compensation buffers, then the group is determined to have stalled and an error
interrupt is provided to software.
33.3.3.3 Cell Processing Task
The cell processing task is triggered by the cell processing activation function. When the cell processing
task is triggered, it will extract cells in-order from the delay compensation buffers. Cells extracted from
the delay compensation buffers are processed per the standard PowerQUICC II ATM operation (i.e.
mapped into ATM channels and processed per the appropriate AAL or OAM function).
If the on-demand cell processing activation function is used, then when the cell processing task is
triggered, it will extract cells in-order from the delay compensation buffers until either (1) no more are
available, or (2) four cells have been extracted. The purpose of limiting the cell processing task to a
maximum of four cells is to limit the maximum latency of servicing requests from the external PHYs. Note
that, on the average, the receive process will deliver one cell to the ATM layer per cell reception.
If the IDCR-regulated processing activation function is used, then one cell will be extracted from the delay
compensation buffers of a particular IMA group per timeout of that group’s IDCR timer.
33.4 IMA Programming Model
33.4.1 Data Structure Organization
Figure 33-12 shows the organization of IMA data structures.