Freescale Semiconductor MPC8260 - Manual (Page 952)

ATM Controller and AAL0, AAL1, and AAL5
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
30-32 Freescale Semiconductor
30.6.6.4 BRC Performance Calculations
BRC reception uses the regular AAL0 raw cell queue. On receiving two consecutive BRC cells, the
management layer can calculate the following:
• The difference between two TUCs (Nt)
• The difference between two TRCCs (Nr)
Information about the connection can be gained by comparing Nt and Nr:
• If Nt > Nr, the difference indicates the number of lost cells of this block test.
• If Nt < Nr, the difference indicates the number of misinserted cells of this block test.
• When Nt = Nr, no cells are lost or misinserted.
30.7 User-Defined Cells (UDC)
Typical ATM cells are 53 bytes long and consist of a 4-byte header, 1-byte HEC, and 48-byte payload. The
PowerQUICC II also supports user-defined cells with up to 12 bytes of extra header fields for internal
information for switching applications. This choice is made during initialization by writing to the FPSMR;
see
Section 30.13.2, “FCC Protocol-Specific Mode Register (FPSMR).” As shown in Figure 30-19 , the
extra header size can vary between 1 to 12 bytes (byte resolution) and the HEC octet is optional.
For AAL5 and AAL1 CES the extra header is taken from the Rx and Tx BDs. The transmitter reads the
extra header from the UDC TxBD and adds it to each ATM cell associated with the current buffer. At the
receive side, the extra header of the last cell in the current buffer is written to the UDC RxBD.
For AAL0 the extra header is attached to the regular ATM cell in the buffer. The transmitter reads the extra
header and the ATM cell from the buffer. The receiver writes the extra header and the regular ATM cell to
the buffer.
30.7.1 UDC Extended Address Mode (UEAD)
For external CAM accesses, the UDC extra header can be used to supply extra routing information; see
Figure 30-20 . If GMODE[UEAD] = 1, two bytes of the UDC header are used as extensions to the ATM
address and the CAM match cycle performs a double-word access. UEAD_OFFSET in the parameter
RAM determines the offset from the beginning of the UDC extra header to the UEAD entry. The offset
should be half-word aligned (even address). See
Section 30.10.1, “Parameter RAM.”
Extra Header (1–12 Bytes)
ATM Cell Header (4 Bytes) + HEC (optional)
Payload (48 Bytes)
Figure 30-19. Format of User-Defined Cells