10 handling interrupts in the spi, Handling interrupts in the spi -18 – Freescale Semiconductor MPC8260 User Manual

Page 1264

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Serial Peripheral Interface (SPI)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

38-18

Freescale Semiconductor

NOTE

If the master sends 3 bytes and negates SPISEL, the RxBD is closed but the
TxBD remains open. If the master sends 5 or more bytes, the TxBD is closed
after the fifth byte. If the master sends 16 bytes and negates SPISEL, the
RxBD is closed without triggering an out-of-buffers error. If the master
sends more than 16 bytes, the RxBD is closed (full) and an out-of-buffers
error occurs after the 17th byte is received.

38.10 Handling Interrupts in the SPI

The following sequence should be followed to handle interrupts in the SPI:

1. Once an interrupt occurs, read SPIE to determine the interrupt source. Normally, SPIE bits should

be cleared at this time.

2. Process the TxBD to reuse it and the RxBD to extract the data from it. To transmit another buffer,

simply set TxBD[R], RxBD[E], and SPCOM[STR].

3. Execute an rfi instruction.

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