Freescale Semiconductor MPC8260 - Manual (Page 81)

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor lxxix
Before Using this Manual—Important Note
Before using this manual, determine whether it is the latest revision and if there are errata or addenda. To
locate any published errata or updates for this document, refer to the world-wide web at
www.freescale.com.
Audience
This manual is intended for software and hardware developers and application programmers who want to
develop products for the PowerQUICC II. It is assumed that the reader has a basic understanding of
computer networking, OSI layers, and RISC architecture. In addition, it is assumed that the reader has a
basic understanding of the communications protocols described here. Where it is considered useful,
additional sources are provided that provide in-depth discussions of such topics.
Organization
Following is a summary and a brief description of the chapters of this manual:
• Part I, “Overview,” provides a high-level description of the PowerQUICC II, describing general
operation and listing basic features.
— Chapter 1, “Overview,” provides a high-level description of PowerQUICC II functions and
features. It roughly follows the structure of this book, summarizing the relevant features and
providing references for the reader who needs additional information.
— Chapter 2, “G2 Core,” provides an overview of the PowerQUICC II core, summarizing topics
described in further detail in subsequent chapters.
— Chapter 3, “Memory Map,” presents a table showing where PowerQUICC II registers are
mapped in memory. It includes cross references that indicate where the registers are described
in detail.
• Part II, “Configuration and Reset,” describes start-up behavior of the PowerQUICC II
— Chapter 4, “System Interface Unit (SIU),” describes the system configuration and protection
functions which provide various monitors and timers, and the 60x bus configuration.
— Chapter 5, “Reset,” describes the behavior of the PowerQUICC II at reset and start-up.
Footnotes • Figures—Attached to elements (such as functional blocks).
• Tables—Attached to rows, columns, or entries. Often used
to designate variation in bit definition.
• Figure 4-31 on page 4-39
Figure 4-8 on page 4-8
• Table 4-15 on page 4-39
Text in-line Parenthetical comments placed within a paragraph or bullet
item list. Indicates a portion of the text pertains only to specific
devices. • Section 1.1, “Features”
• First bullet item in Section 1.2.2,
“System Interface Unit (SIU)”
Table ii. Device- and Silicon-Specific Notations (continued)
Format Usage Example