2 apc priority table, Table 30-30. apc priority table entry, 3 apc scheduling tables – Freescale Semiconductor MPC8260 User Manual

Page 985: Figure 30-39. the apc scheduling table structure, Apc priority table -65, Apc scheduling tables -65, The apc scheduling table structure -65, Apc priority table entry -65

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ATM Controller and AAL0, AAL1, and AAL5

MPC8260 PowerQUICC II Family Reference Manual, Rev. 2

Freescale Semiconductor

30-65

30.10.4.2 APC Priority Table

Each PHY’s APC priority table holds pointers to the APC scheduling table of each priority level. It resides
in the dual-port RAM. The priority table can hold up to eight priority levels.

Table 30-30

shows the

structure of a priority table entry.

30.10.4.3 APC Scheduling Tables

The APC uses APC scheduling tables (one table for each priority level) to schedule channel transmission.
A scheduling table is divided into time slots, as shown in

Figure 30-39

. Each slot is a half-word entry. Note

that the APC scheduling tables should be cleared before the APC unit is enabled.

Figure 30-39. The APC Scheduling Table Structure

Slot N+1 is used as a control slot, as shown in

Figure 30-40

.

0x09

CPS_ABR

Byte ABR only. Cells per slot represented as a power of two. User-defined. (For

example, if CPS is 1, CPS_ABR = 0x00; if CPS is 8, CPS_ABR = 0x03.)

0x0A

LINE_RATE_AB

R

Hword ABR only. The PHY line rate in cells/sec, represented in TM 4.0 floating-point

format. User-defined.

0xC

REAL_TSTP

Word

Real-time stamp pointer used internally by the APC. Should be cleared initially.

0x10

APC_STATE

Word

Used internally by the APC. Should be cleared initially.

1

Offset values are to APCP_BASE+PHY#

× 32. However, in slave mode, the offset is from APCP_BASE regardless of

the PHY address.

Table 30-30. APC Priority Table Entry

Offset Name

Width

Description

0x00

APC_LEVi_BASE Hword APC level i base address. Pointer to the first slot in the APC scheduling table for

level i. Should be half-word aligned. User-defined.

0x02

APC_LEVi_END

Hword APC level i end address. Pointer to the last slot in the APC scheduling table for

level i. Should be half-word aligned. User-defined.

0x04

APC_LEVi_RPTR Hword APC level i real-time/service pointers. APC table pointers used internally by the

APC. Initialize both pointers to APC_LEVi_BASE.

0x06

APC_LEVi_SPTR Hword

Table 30-29. APC Parameter Table (continued)

Offset

1

Name

Width

Description

APC_LEVi_BASE

APC_LEVi_END

Half Word Entry

slot 0

slot 1

slot N

Control

Slot

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