Freescale Semiconductor MPC8260 - Manual (Page 581)

Serial Interface with Time-Slot Assigner
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
Freescale Semiconductor 15-5
Figure 15-2. Various Configurations of a Single TDM Channel
TSA TDM
TSA
TSA
TSA
Slot
Slot
3
3 Slot
Slot
N
N
TDM
TDM
TDM
SCC2 SMC1
SCC2 SMC1
TDM Tx
TDM Rx
Slot 2
Slot N
1 TDM Sync
1 TDM Clock
SMC1
SCC2 SMC1
TDM Tx
TDM Rx
Slot 1
Slot 3
SCC2
More complex TDM example—unique routing
SCC2 SMC1 SCC2
SCC2 SMC1 SCC2
TDM Tx
TDM Rx
Even more complex TDM example—multiple time slot per
SCC2 SMC1 SCC2
TDM Tx
TDM Rx
Most complex TDM example —Totally independent Rx and Tx
NOTE: The two shaded areas off SCC2 Rx are received as one high-speed data stream by SCC2 Rx
stored together in the same data buffers
channel with varying sizes of time slots
PowerQUICC II
PowerQUICC II
PowerQUICC II
1 TDM Sync
1 TDM Clock
1 TDM Sync
1 TDM Clock
1 TDM Sync
1 TDM Clock
1 TDM Sync
1 TDM Clock