Renesas SH7781 - Manual (Page 1026)

20. Graphics Data Translation Accelerator (GDTA)
Rev.1.00 Jan. 10, 2008 Page 996 of 1658
REJ09B0261-0100
20.3.17 CL Input Y Padding Size Setting Register (CLIYPR)
CLIYPR is in the CL register block and sets the input Y padding size in byte units.
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯
BIt:
Initial value:
R/W:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
CL_IYP
⎯ ⎯ ⎯ ⎯
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W ⎯ ⎯ ⎯ ⎯
BIt:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 12
⎯ All
0
⎯ Reserved
These bits are always read as 0. The write value should
always be 0.
11 to 0 CL_IYP All 0 R/W Input Y padding size setting
Should be set in byte units.
Value set should be 2
× n (n: an integer greater than 0)
Notes: 1. Addition is performed taking that 1 pixel = 1 byte.
2. CLWR (bytes) + CLIYPR (bytes) should be 32 bytes
× n (n: an integer greater than 0)