Renesas SH7781 - Manual (Page 1325)

25. Audio Codec Interface (HAC)
Rev.1.00 Jan. 10, 2008 Page 1295 of 1658
REJ09B0261-0100
25.5.6 Power-Down Mode
It is possible to stop or resume the supply of clock to the HAC using the MSTP16 and MSTP17
bits in the standby control register 0 (MSTPCR0), which is a register used in power-down modes.
To cancel module standby function and resume the supply of clock to the HAC, write 0 to the
MSTP16 and MSTP17 bits in the standby control register 0 (MSTPCR0). It enables all accesses to
the HAC.
To place the HAC into the power-down mode, take the following steps:
1. Check that all data transfers have ended. Also check that the transmit buffer is empty and the
receive buffer has been read out to be empty.
2. Disable all DMA requests and interrupt requests.
3. Place the codec into power-down mode.
4. Write 0 to the MSTP16 and MSTP17 bits in the standby control register 0 (MSTPCR0).
25.5.7 Notes
The HAC_SYNC signal is generated by the HAC to indicate the position of slot 0 within a frame.
When using the two channels of the HAC concurrently, connect the
HAC_RES pin to the reset
pins of the two codecs.
25.5.8 Reference
AC'97 Component Specification, Revision 2.1