Figure 4.2 instruction execution patterns (9) – Renesas SH7781 User Manual

Page 105

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4. Pipelining

Rev.1.00 Jan. 10, 2008 Page 75 of 1658

REJ09B0261-0100

I1

I2

I3

ID

FE1

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FEPL

FEPL

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FS

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I2

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ID

FE1

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I1

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ID

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FE3

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FE1

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I1

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ID

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FE1

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FS

(6-19) FIPR: 1 issue cycle

(6-20) FTRV: 1 issue cycle

(6-21) FSRRA: 1 issue cycle

(6-22) FSCA: 1 issue cycle

Function computing unit occupied cycle

Function computing unit occupied cycle

Figure 4.2 Instruction Execution Patterns (9)

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