9 rx status register (hacrsr) – Renesas SH7781 User Manual
Page 1312
25. Audio Codec Interface (HAC)
Rev.1.00 Jan. 10, 2008 Page 1282 of 1658
REJ09B0261-0100
Bit Bit
Name
Initial
Value R/W Description
12
PRRFOVIE 0
R/W
PCMR RX Overrun Interrupt Enable
0: Disables PCMR RX overrun interrupts.
1: Enables PCMR RX overrun interrupts.
11 to 0
⎯ All
0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
25.3.9
RX Status Register (HACRSR)
HACRSR is a 32-bit read/write register that indicates the status of the HAC RX controller.
Writing 0 to the bit will initialize it.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Bit:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Initial value:
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R/W:
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R/W
R/W
R
R
R
R
⎯
⎯
⎯
⎯
STARY STDRY
PLR
FRQ
PRR
FRQ
PLR
FOV
PRR
FOV
0