Renesas SH7781 User Manual
Page 1532
30. User Debugging Interface (H-UDI)
Rev.1.00 Jan. 10, 2008 Page 1502 of 1658
REJ09B0261-0100
Number Pin
Name
Type
Number Pin
Name
Type
55 SCK5/HAC1/SDOUT/SSI1/
SDATA
Control
26 SCK1
Input
54 SCK5/HAC1/SDOUT/SSI1/
SDATA
Output
25 SCK1
Control
53 RXD5/HAC1/SDIN/SSI1/SCK
Input
24 SCK1
Output
52 RXD5/HAC1/SDIN/SSI1/SCK
Control
23 RXD1
Input
51 RXD5/HAC1/SDIN/SSI1/SCK
Output
22 RXD1
Control
50 TXD5/HAC1/SYNC/SSI1/WS
Input
21 RXD1
Output
49 TXD5/HAC1/SYNC/SSI1/WS
Control
20 TXD1
Input
48 TXD5/HAC1/SYNC/SSI1/WS
Output
19 TXD1
Control
47 HAC1/BITCLK/SSI1/CLK Input
18 TXD1
Output
46 HAC1/BITCLK/SSI1/CLK Control
17
CTS0/INTD/FCE Input
45 HAC1/BITCLK/SSI1/CLK Output
16
CTS0/INTD/FCE Control
44 TXD/HAC0/SDOUT/SSI0/SDATA Input
15
CTS0/INTD/FCE Output
43 TXD/HAC0/SDOUT/SSI0/SDATA Control
14
RTS0/HSPI/CS/FSE Input
42 TXD/HAC0/SDOUT/SSI0/SDATA Output
13
RTS0/HSPI/CS/FSE Control
41 RXD/HAC0/SDIN/SSI0/SCK
Input
12
RTS0/HSPI/CS/FSE Output
40 RXD/HAC0/SDIN/SSI0/SCK
Control
11 SCK0/HSPI/CLK/FRE Input
39 RXD/HAC0/SDIN/SSI0/SCK
Output
10 SCK0/HSPI/CLK/FRE Control
38 SYNC/HAC0/SYNC/SSI0/WS
Input
9 SCK0/HSPI/CLK/FRE
Output
37 SYNC/HAC0/SYNC/SSI0/WS
Control
8 RXD0/HSPI/RX/FR/
B Input
36 SYNC/HAC0/SYNC/SSI0/WS
Output
7 RXD0/HSPI/RX/FR/
B Control
35 MCLK/HAC/
RES Input
6 RXD0/HSPI/RX/FR/
B Output
34 MCLK/HAC/
RES Control
5 TXD0/HSPI/TX/
FWE Input
33 MCLK/HAC/
RES Output
4 TXD0/HSPI/TX/
FWE Control
32 SCK/HAC0/BITCLK/SSI0/CLK
Input
3 TXD0/HSPI/TX/
FWE Output
31 SCK/HAC0/BITCLK/SSI0/CLK
Control
2
ASEBRK Input
30 SCK/HAC0/BITCLK/SSI0/CLK
Output
1
ASEBRK Control
29 RXD2/SIOFRXD1
Input
0
ASEBRK Output
28 RXD2/SIOFRXD1
Control
To
TDO
27 RXD2/SIOFRXD1
Output
Note: * Control means a low-active signal. When a low-active signal is driven low, the
corresponding pin is driven by the output value.