Figure 4.2 instruction execution patterns (7) – Renesas SH7781 User Manual
Page 103
4. Pipelining
Rev.1.00 Jan. 10, 2008 Page 73 of 1658
REJ09B0261-0100
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(6-1) LDS to FPUL: 1 issue cycle
(6-2) STS from FPUL: 1 issue cycle
(6-3) LDS.L to FPUL: 1 issue cycle
(6-4) STS.L from FPUL: 1 issue cycle
(6-5) LDS to FPSCR: 1 issue cycle
(6-6) STS from FPSCR: 1 issue cycle
(6-7) LDS.L to FPSCR: 1 issue cycle
(6-8) STS.L from FPSCR: 1 issue cycle
(6-9) FPU load/store instruction FMOV: 1 issue cycle
(6-10) FLDS: 1 issue cycle
(6-11) FSTS: 1 issue cycle
Figure 4.2 Instruction Execution Patterns (7)