Renesas SH7781 - Manual (Page 826)

17. Power-Down Mode
Rev.1.00 Jan. 10, 2008 Page 796 of 1658
REJ09B0261-0100
17.6 Module Standby Functions
This LSI supports the module standby state, where the clock supplied to on-chip modules is
stopped.
17.6.1 Transition to Module Standby Mode
By setting the MSTP bits in MSPTCR, the clock supply can be stopped to the corresponding
module*.
In each module that is in the module standby state, the state right before transition to module
standby state is retained. After register setting, the state right before stop is retained. The state of
the external pin is retained. When the module is released from the module standby state, the
module resumes operation.
SSI, HSPI, HAC, and MMCIF are initialized by a manual reset even if they are in the module
standby state. Confirm that the operation of GDTA is completed before putting GDTA and
DMAC in the module standby state.
Note: * For details of the description of the individual MSTP bits in the standby control
registers, see section 17.3.2, Standby Control Register 0 (MSTPCR0) and 17.3.3,
Standby Control Register 1 (MSTPCR1).
The MSTP bits should be set to 1 while the module is in the idle state after completing
its operation and there is no possible activation sources from external pins or other
modules.
17.6.2 Releasing Module Standby Functions
The module standby functions are released by clearing the MSTP bits in MSTPCR0 to 0 or a
power-on reset.