Renesas SH7781 User Manual
Page 600
13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 570 of 1658
REJ09B0261-0100
Bit Bit
Name
Initial
Value R/W
Description
0 OMP
0
SH:
R/W
PCI: R
PCI Operating Mode (Primary)
If this bit is written during register initialization
(PCICR.CFINT
= 0) in the PCIC, the value of this bit is
updated. The value is not updated after initialization
(PCICR.CFINT
= 1).
(7)
PCI Sub Class Code Register (PCISUB)
This field defines the sub class code. For details of the code value, see appendix D in PCI Local
Bus Specification Revision 2.2.
0
1
2
3
4
5
6
7
0
0
0
0
0
0
0
0
SUB
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
SH R/W:
R
R
R
R
R
R
R
R
PCI R/W:
Bit Bit
Name
Initial
Value R/W
Description
7 to 0
SUB
H'00
SH: R/W
PCI: R
Sub Class Code
These bits indicate the sub class code. The initial
value is H'00.