20 port d data register (pddr) – Renesas SH7781 User Manual

Page 1451

Advertising
background image

28. General Purpose I/O Ports (GPIO)

Rev.1.00 Jan. 10, 2008 Page 1421 of 1658

REJ09B0261-0100

28.2.20

Port D Data Register (PDDR)

PDDR is an 8-bit readable/writable register that stores port D data.

0

1

2

3

4

5

6

7

0

0

0

0

0

0

0

0

PD0DT

PD1DT

PD2DT

PD3DT

PD4DT

PD5DT

PD6DT

PD7DT

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Bit:

Initial value:

R/W:

Bit Bit

Name

Initial
value R/W Description

7 PD7DT

0 R/W

6 PD6DT

0 R/W

5 PD5DT

0 R/W

4 PD4DT

0 R/W

3 PD3DT

0 R/W

2 PD2DT

0 R/W

1 PD1DT

0 R/W

These bits store output data of a pin which is used as a
general-purpose output port. When the pin functions as
a general-purpose output port, reading the port will read
out the value of the corresponding bit of this register.

When the pin functions as a general-purpose input port,
reading the port will read out the status of the
corresponding pin.

0 PD0DT

0 R/W

Advertising