Renesas SH7781 - Manual (Page 996)

19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 966 of 1658
REJ09B0261-0100
19.5.5 Output Signal Timing Adjustment
The display unit (DU) enables selection of output timing, with respect to the output dot clock, of
the various output signals (the four sync signals HSYNC, VSYNC, CSYNC, ODDF, as well as
DISP, CDE, CLAMP, DE, digital RGB signals). Timing is selected by setting OTAR.
Table 19.16 Output Signal Timing Setting Parameters
Bit Name in OTAR Description
SYNCA Sets output timing of the HSYNC, VSYNC, CSYNC, ODDF signal
DISPA Sets output timing of the DISP signal
CDEA Sets output timing of the CDE signal
DRGBA Sets output timing of digital RGB signal
CLAMPA Sets output timing of the CLAMP signal
DEA Sets output timing of the DE signal
DCLKOUT
Reference timing
Adjustable range of output timing
Register value
B'000
(Initial value)
B'100
B'101
B'001
B'110
B'010
B'111
B'011
Note: Timing charts other than this chart in this section are all provided on basic timing.
Figure 19.19 Adjustable Range of Output Timing