Renesas SH7781 - Manual (Page 256)

8. Caches
Rev.1.00 Jan. 10, 2008 Page 226 of 1658
REJ09B0261-0100
8.3.6 OC Two-Way Mode
When the OC2W bit in RAMCR is set to 1, OC two-way mode which only uses way 0 and way 1
in the OC is entered. Thus, power consumption can be reduced. In this mode, only way 0 and way
1 are used even if a memory-mapped OC access is made.
The OC2W bit should be modified by a program in the P2 area. At that time, if the valid line has
already been recorded in the OC, data should be written back by software, if necessary, 1 should
be written to the OCI bit in CCR, and all entries in the OC should be invalid before modifying the
OC2W bit.