Renesas SH7781 - Manual (Page 467)

11. Local Bus State Controller (LBSC)
Rev.1.00 Jan. 10, 2008 Page 437 of 1658
REJ09B0261-0100
Tm1
CLKOUT
RD/FRAME
CSn
R/ W
D31 to D0
BS
Tmd1w Tmd1 Tmd2 Tmd3 Tmd4 Tmd5 Tmd6 Tmd7 Tmd8
RDY
DACKn
A
In this example, DACKn is active-high.
D2 D3 D1 D4 D6 D7 D8 D5
Figure 11.32 MPX Interface Timing 9 (Burst Read Cycle, IW
= 0000,
No External Wait, 32-Bit Bus Width, 32-Byte Data Transfer)