8 rx interrupt enable register (hacrier) – Renesas SH7781 User Manual
Page 1311
25. Audio Codec Interface (HAC)
Rev.1.00 Jan. 10, 2008 Page 1281 of 1658
REJ09B0261-0100
25.3.8
RX Interrupt Enable Register (HACRIER)
HACRIER is a 32-bit read/write register that enables or disables HAC RX interrupts.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
Bit:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Initial value:
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R/W:
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R/W
R/W
R
R
R
R
PLRF
OVIE
PRRF
OVIE
⎯
⎯
⎯
⎯
PLRF
RQIE
STDR
YIE
STAR
YIE
PRRF
RQIE
0
Bit Bit
Name
Initial
Value R/W Description
31 to 23
⎯ All
0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
22 STARYIE
0 R/W
Status
Address Ready Interrupt Enable
0: Disables status address ready interrupts.
1: Enables status address ready interrupts.
21
STDRYIE
0
R/W
Status Data Ready Interrupt Enable
0: Disables status data ready interrupts.
1: Enables status data ready interrupts.
20
PLRFRQIE 0
R/W
PCML RX Request Interrupt Enable
0: Disables PCML RX request interrupts.
1: Enables PCML RX request interrupts.
19
PRRFRQIE 0
R/W
PCMR RX Request Interrupt Enable
0: Disables PCMR RX request interrupts.
1: Enables PCMR RX request interrupts.
18 to 14
⎯ All
0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
13
PLRFOVIE 0
R/W
PCML RX Overrun Interrupt Enable
0: Disables PCML RX overrun interrupts.
1: Enables PCML RX overrun interrupts.