Renesas SH7781 User Manual
Page 78
3. Instruction Set
Rev.1.00 Jan. 10, 2008 Page 48 of 1658
REJ09B0261-0100
Addressing
Mode
Instruction
Format
Effective Address Calculation Method
Calculation
Formula
Register
indirect
with pre-
decrement
@–Rn
Effective address is register Rn contents,
decremented by a constant beforehand:
1 for a byte operand, 2 for a word operand,
4 for a longword operand, 8 for a quadword
operand.
Rn
1/2/4
Rn – 1/2/4/8
–
Rn – 1/2/4
Byte:
Rn – 1
→ Rn
Word:
Rn – 2
→ Rn
Longword:
Rn – 4
→ Rn
Quadword:
Rn – 8
→ Rn
Rn
→ EA
(Instruction
executed
with Rn after
calculation)
Register
indirect with
displacement
@(disp:4, Rn) Effective address is register Rn contents with
4-bit displacement disp added. After disp is
zero-extended, it is multiplied by 1 (byte), 2
(word), or 4 (longword), according to the operand
size.
Rn
Rn + disp
Ч 1/2/4
+
Ч
1/2/4
disp
(zero-extended)
Byte: Rn + disp
→ EA
Word: Rn + disp
× 2 → EA
Longword:
Rn + disp
× 4 →
EA
Indexed
register
indirect
@(R0, Rn)
Effective address is sum of register Rn and R0
contents.
Rn
R0
Rn + R0
+
Rn + R0
→ EA