Renesas SH7781 User Manual

Page 1441

Advertising
background image

28. General Purpose I/O Ports (GPIO)

Rev.1.00 Jan. 10, 2008 Page 1411 of 1658

REJ09B0261-0100

Bit Bit

Name

Initial
value R/W Description

7

6

PL3MD1

PL3MD0

1

1

R/W

R/W

PN3 Mode

00: SCIF[3]/FLCTL module

(MODE8/SCIF3_SCK/FD0)*

1

01: Port output

10: Port input (pull-up MOS: Off)

11: Port input (pull-up MOS: On)*

2

5

4

PL2MD1

PL2MD0

1

1

R/W

R/W

PN2 Mode

00: SCIF[4]/FLCTL module

(MODE9/SCIF4_TXD/FD1)*

1

01: Port output

10: Port input (pull-up MOS: Off)

11: Port input (pull-up MOS: On)*

2

3

2

PL1MD1

PL1MD0

1

1

R/W

R/W

PN1 Mode

00: SCIF[4]/FLCTL module

(MODE10/SCIF4_RXD/FD2)*

1

01: Port output

10: Port input (pull-up MOS: Off)

11: Port input (pull-up MOS: On)*

2

1

0

PL0MD1

PL0MD0

1

1

R/W

R/W

PL0 Mode

00: SCIF[4]/FLCTL module

(MODE11/SCIF4_SCK/FD3)*

1

01: Port output

10: Port input (pull-up MOS: Off)

11: Port input (pull-up MOS: On)*

2

Notes: 1. The module that uses this pin can be selected by the peripheral module select register

1 (P1MSELR).

2. The pull-up MOS of these pins cannot be used for MODE pin setting during power-on

reset by the

PRESET pin. (The pull-up MOS is turned off during power-on reset by the

PRESET pin.)

Advertising