Renesas SH7781 - Manual (Page 450)

11. Local Bus State Controller (LBSC)
Rev.1.00 Jan. 10, 2008 Page 420 of 1658
REJ09B0261-0100
G
A25 to A0
D15 to D0
PC card
(memory I/O)
CD1, CD2
CE1
G
CE2
OE
WE/PGM
(
IORD)
( IOWR)
( IOIS6)
WAIT
A25 to A0
D15 to D0
PC card
(memory I/O)
CD1, CD2
CE1
CE2
OE
WE/PGM
WAIT
A25 to A0
SH7785
D15 to D0
R/ W
CE2B
CE2A
RD
WE1
CE1B/(CS6)
CE1A/(CS5)
ICIORD
ICIOWR
RDY
IOIS16
G
DIR
D7 to D0
D15 to D8
G
DIR
G
G
G
DIR
G
DIR
D7 to D0
Card
detection
circuit
Card
detection
circuit
D15 to D8
REG REG
REG
Figure 11.16 Example of PCMCIA Interface