Renesas SH7781 User Manual
Page 28
Rev.1.00 Jan. 10, 2008 Page xxviii of xxx
REJ09B0261-0100
28.2.37
Port L Pull-Up Control Register (PLPUPR) ..................................................... 1438
28.2.38
Port M Pull-Up Control Register (PMPUPR)................................................... 1439
28.2.39
Port N Pull-Up Control Register (PNPUPR) .................................................... 1440
28.2.40
Input-Pin Pull-Up Control Register 1 (PPUPR1) ............................................. 1441
28.2.41
Input-Pin Pull-Up Control Register 2 (PPUPR2) ............................................. 1441
28.2.42
Peripheral Module Select Register 1 (P1MSELR) ........................................... 1443
28.2.43
Peripheral Module Select Register 2 (P2MSELR) ........................................... 1447
28.3
Usage Example ................................................................................................................ 1449
28.3.1
Port Output Function ........................................................................................ 1449
28.3.2
Port Input function............................................................................................ 1450
28.3.3
Peripheral Module Function ............................................................................. 1451
Section 29 User Break Controller (UBC)
.................................................................... 1453
29.1
Features............................................................................................................................ 1453
29.2
Register Descriptions ....................................................................................................... 1455
29.2.1
Match Condition Setting Registers 0 and 1 (CBR0 and CBR1) ....................... 1457
29.2.2
Match Operation Setting Registers 0 and 1 (CRR0 and CRR1) ....................... 1463
29.2.3
Match Address Setting Registers 0 and 1 (CAR0 and CAR1).......................... 1465
29.2.4
Match Address Mask Setting Registers 0 and 1 (CAMR0 and CAMR1)......... 1466
29.2.5
Match Data Setting Register 1 (CDR1) ............................................................ 1468
29.2.6
Match Data Mask Setting Register 1 (CDMR1)............................................... 1469
29.2.7
Execution Count Break Register 1 (CETR1).................................................... 1470
29.2.8
Channel Match Flag Register (CCMFR) .......................................................... 1471
29.2.9
Break Control Register (CBCR) ....................................................................... 1472
29.3
Operation Description...................................................................................................... 1473
29.3.1
Definition of Words Related to Accesses ......................................................... 1473
29.3.2
User Break Operation Sequence ....................................................................... 1474
29.3.3
Instruction Fetch Cycle Break .......................................................................... 1475
29.3.4
Operand Access Cycle Break ........................................................................... 1476
29.3.5
Sequential Break............................................................................................... 1477
29.3.6
Program Counter Value to be Saved................................................................. 1479
29.4
User Break Debugging Support Function ........................................................................ 1480
29.5
User Break Examples....................................................................................................... 1481
29.6
Usage Notes ..................................................................................................................... 1485
Section 30 User Debugging Interface (H-UDI)
......................................................... 1487
30.1
Features............................................................................................................................ 1487
30.2
Input/Output Pins............................................................................................................. 1489
30.3
Register Description ........................................................................................................ 1491
30.3.1
Instruction Register (SDIR) .............................................................................. 1492