Renesas SH7781 - Manual (Page 792)

16. Watchdog Timer and Reset (WDT)
Rev.1.00 Jan. 10, 2008 Page 762 of 1658
REJ09B0261-0100
16.3 Register Descriptions
Table 16.2 shows the registers of the WDT module. Table 16.3 shows the register states in each
operating mode.
Table 16.2 Register Configuration
Register Name Abbreviation R/W P4 Address
Area 7
Address Access
Size Sync
Clock
Watchdog timer stop time register WDTST R/W H'FFCC 0000 H'1FCC 0000 32 Pck
Watchdog timer control/status
register WDTCSR R/W H'FFCC 0004 H'1FCC 0004 32 Pck
Watchdog timer base stop time
register WDTBST R/W H'FFCC 0008 H'1FCC 0008 32 Pck
Watchdog timer counter WDTCNT R H'FFCC 0010 H'1FCC 0010 32 Pck
Watchdog timer base counter WDTBCNT R H'FFCC 0018 H'1FCC 0018 32 Pck
Table 16.3 Register States in Each Operating Mode
Register Name Abbreviation
Power-on
Reset by
PRESET Pin Power-on
Reset by
WDT/H-UDI
Manual
Reset by
WDT/
Multiple
Exception
Sleep/Deep
Sleep Mode
by SLEEP
Instruction
Watchdog timer stop time register WDTST H'0000 0000 Retained Retained Retained
Watchdog timer control/status
register WDTCSR H'0000 0000 Retained Retained Retained
Watchdog timer base stop time
register WDTBST H'0000 0000 Retained Retained Retained
Watchdog timer counter WDTCNT H'0000 0000 H'0000 0000 Retained Retained
Watchdog timer base counter WDTBCNT H'0000 0000 H'0000 0000 Retained Retained