19) pci interrupt line register (pciintline) – Renesas SH7781 User Manual
Page 610
13. PCI Controller (PCIC)
Rev.1.00 Jan. 10, 2008 Page 580 of 1658
REJ09B0261-0100
(18)
PCI Capability Pointer Register (PCICP)
This register is the extension function pointer register of the PCI configuration register that is
defined in the PCI Power Management Specification.
0
1
2
3
4
5
6
7
0
0
0
0
0
0
1
0
CP
R
R
R
R
R
R
R
R
Bit:
Initial value:
SH R/W:
R
R
R
R
R
R
R
R
PCI R/W:
Bit Bit
Name
Initial
Value R/W
Description
7 to 0
CP
H'40
SH: R
PCI: R
Capabilities Pointer
These bits indicate the offset of the expansion
function (power management) ID register.
(19)
PCI Interrupt Line Register (PCIINTLINE)
0
1
2
3
4
5
6
7
0
0
0
0
0
0
0
0
INTLINE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit:
Initial value:
SH R/W:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PCI R/W:
Bit Bit
Name
Initial
Value R/W
Description
7 to 0
INTLINE
H'00
SH: R/W
PCI: R/W
PCI Interrupt Line
These bits specify the information on PCI interrupt
path from this LSI. These bits are set by system
software during initialization. The initial value is H'00.
The setting value of this register does not affect the
operation of this LSI.