Renesas SH7781 - Manual (Page 879)

19. Display Unit (DU)
Rev.1.00 Jan. 10, 2008 Page 849 of 1658
REJ09B0261-0100
19.3.3 Display Status Register (DSSR)
The display status register (DSSR) is a register used to read, from outside, the internal state of the
display unit (DU).
R/W:
Internal update:
R/W:
Internal update:
16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 30 Bit:
Initial value:
R R R R R R R R R R R R R R R R
0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0
DFB1 DFB2 DFB3 DFB4 DFB5 DFB6 — — — — — — — — — —
R R R R R R R R R R R R R R R R
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
— — — — — — — — HBK RINT — VBK — — TVR FRM
0 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14 Bit:
Initial value:
Bit Bit Name
Initial
Value R/W Internal
Update Description
31, 30
⎯ 00
R
⎯ Reserved
These bits are always read as 0. The write value
should always be 0.
29, 28
⎯ 11
R
⎯ Reserved
These bits are always read as 1. The write value
should always be 1.
27 to 22
⎯ All
0 R
⎯ Reserved
These bits are always read as 0. The write value
should always be 0.
21 DFB6 0 R None Display Frame Buffer 6 Flag
0: The address indicated by the plane 6 display
area start address 0 register (P6DSA0R) in
plane 6 is being used as the display area start
address
1: The address indicated by the plane 6 display
area start address 1 register (P6DSA1R) in
plane 6 is being used as the display area start
address