17 fifo pointer clear register (fifoclr) – Renesas SH7781 User Manual
Page 1237
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24. Multimedia Card Interface (MMCIF)
Rev.1.00 Jan. 10, 2008 Page 1207 of 1658
REJ09B0261-0100
H'01
1 word (2 bytes)
64 words
H'23
H'45
.
.
.
.
.
.
H'67
H'89
FIFO
H'AB
Figure 24.2 DR Access Example
24.3.17
FIFO Pointer Clear Register (FIFOCLR)
The FIFO write/read pointer is cleared by writing an arbitrary value to FIFOCLR.
Bit:
Initial value:
R/W:
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
W
FIFOCLR
W
W
W
W
W
W
W
Bit Bit
Name
Initial
Value R/W Description
7 to 0
FIFOCLR
H'00
W
The FIFO pointer is cleared by writing an arbitrary value
to this register.
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